november 2005 p2040b rev 0.1 alliance semiconductor 2575 augustine drive ? santa clara, ca ? tel: 408.855.4900 ? fax: 408.855.4999 ? www.alsc.com notice: the information in this document is subject to change without notice. lcd panel emi reduction ic features ? provides up to 15db of emi suppression ? fcc approved method of emi attenuation ? generates a low emi spread spectrum clock of the input frequency ? 30mhz to 100mhz input frequency range ? optimized for 32.5mhz , 54mhz, 65mhz, 81mhz, pixel clock frequencies ? internal loop filter minimizes external components and board space ? 8 selectable spread ranges, up to +/- 2.0% ? sson# control pin for spread spectrum enable and disable options ? low cycle-to-cycle jitter ? 3.3v operating voltage ? ultra low power cmos design ? supports most mobile graphic accelerator and lcd timing controller specifications ? available in 8 pin soic and tssop packages. product description the p2040b is a selectable spread spectrum frequency modulator designed specifically for digital flat panel applications. the p2040b reduces electromagnetic interference (emi) at the clock source which provides system wide reduction of emi of all clock dependent signals. the p2040b allows significant system cost savings by reducing the number of circuit board layers and shielding that are traditionally required to pass emi regulations. the p2040b uses the most efficient and optimized modulation profile approved by the fcc and is implemented in a proprietary all digital method. the p2040b modulates the output of a single pll in order to ?spread? the bandwidth of a synthesized clock and, more importantly, decreases the peak amplitudes of its harmonics. this results in significantly lower system emi compared to the typical narrow band signal produced by oscillators and most frequency generators. lowering emi by increasing a signal?s bandwidth is called ?spread spectrum clock generation?. applications the p2040b is targeted towards digital flat panel applications for no tebook pcs, palm-size pcs, office automation equipments and lcd monitors. block diagram loop filter output divider modulation v dd sr0 v ss modout clkin frequency divider feedback divider phase detector vco pll cp1 cp0 sson#
november 2005 p2040b rev 0.1 lcd panel emi reduction ic 2 of 8 notice: the information in this document is subject to change without notice. pin configuration table 1 ? deviations and modulation rate table. spreading range (+/- %) cp0 cp1 sr0 32.5mhz 54mhz 65mhz 81mhz modulation rate 0 0 0 0.56 1.05 1.00 0.98 (fin/40) * 62.49khz 0 0 1 1.94 1.68 1.56 1.48 (fin/40) * 62.49khz 0 1 0 1.36 1.05 1.00 0.92 (fin/40) * 62.49khz 0 1 1 1.92 1.68 1.56 1.48 (fin/40) * 62.49khz 1 0 0 1.24 0.81 0.66 0.40 (fin/40) * 62.49khz 1 0 1 1.91 1.29 1.02 0.74 (fin/40) * 62.49khz 1 1 0 0.91 0.45 0.34 0.05 (fin/40) * 62.49khz 1 1 1 1.47 0.71 0.54 0.36 (fin/40) * 62.49khz pin description pin# pin name type description 1 clkin i external reference frequency input. connect to externally generated reference signal. 2 cp0 i digital logic input used to select charge pump current (see table 1). this pin has a 100k ohm internal pull-up resistor. 3 cp1 i digital logic input used to select charge pump current (see table 1). this pin has a 100k ohm internal pull-up resistor. 4 v ss p ground connection. connect to system ground. 5 sson# i digital logic input used to enable sp read spectrum function (active low). spread spectrum function enable when low. this pin has a 100k ohm internal pull-low resistor. 6 modout o spectrum clock output 7 sr0 i digital logic input used to select spreading range (see table 1) this pin has a 100k ohm internal pull-up resistor. 8 v dd p connect to +3.3v sr0 sson# 1 2 3 4 5 6 7 8 p2040b clkin cp0 cp1 v ss modout v dd
november 2005 p2040b rev 0.1 lcd panel emi reduction ic 3 of 8 notice: the information in this document is subject to change without notice. spread spectrum selection table 1 illustrates the possible spread spectrum options. the optimal setting should minimize system emi to the fullest without affecting system performance. the spreading is describ ed as a percentage deviation of the center frequency (note: the center frequency is the fr equency of the external reference input on clkin, pin 1). example : p2040b is designed for high resolution flat panel appl ications and is able to support panel frequencies from 30mhz to 100mhz. for a 65mhz pixel clock frequency, a spreading selection of cp0 = 0,cp1=1 and sr0=1 gives a percentage deviation of +/-1.56% (see table 1). this re sults in frequency on modout being swept from 64.5mhz to 65.5mhz. this particular example given here is a common emi reduction method for notebook lcd panel and has already been implemented by most of the leading oem and mobile graphic accelerator manufacturers. application schematic for mobile lcd graphics controllers absolute maximum ratings symbol parameter rating unit v dd , v in voltage on any pin with respect to ground -0.5 to +7.0 v t stg storage temperature -65 to +125 c t a operating temperature -40 to +85 c t s max. soldering temperature (10 sec) 260 c t j junction temperature 150 c t dv static discharge voltage (as per jedec std22- a114-b) 2 kv note: these are stress ratings only and are not implied for functional use. exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. p2040b clkin cp0 sr0 sson# cp1 v ss modout 1 2 3 4 5 6 7 8 v dd v dd digital control for ss enable or disable 0.1 f modulation 65mhz signal with +/- 1.56% deviation and modulation rate of 101.54 khz. this signal is connected back to the spread spectrum input pin (ssin) of the gra p hics accelerator. 65mhz from graphics
november 2005 p2040b rev 0.1 lcd panel emi reduction ic 4 of 8 notice: the information in this document is subject to change without notice. dc electrical characteristics symbol parameter min typ max unit v il input low voltage v ss ? 0.3 - 0.8 v v ih input high voltage 2.0 - v dd + 0.3 v i il input low current (100k ? input pull-up resistor on inputs sr0, cp1and cp0) - - -35 a i ih input high current (100k ? input pull-low resistor on input sson#) - - 35 a v ol output low current v dd = 3.3v, i ol = 20ma - - 0.4 v v oh output high current v dd = 3.3v, i oh = 20ma 2.5 - - v i dd static supply current - 0.6 - ma i cc dynamic supply current (3.3v and 15pf loading) 9 16 22 ma v dd operating volt age 3.0 3.3 3.6 v t on power up time (first locked clo ck cycle after power up) - 0.18 - ms z out clock output impedance - 50 - ? ac electrical characteristics symbol parameter min typ max unit f in input frequency 30 - 100 mhz f out output frequency 30 - 100 mhz t lh 1 output rise time measured at 0.8v to 2.0v 0.7 0.9 1.1 ns t hl 1 output fall time measured at 2.0v to 0.8v 0.6 0.8 1.0 ns t jc jitter (cycle to cycle) - 360 - ps t d output duty cycle 45 50 55 % note: 1. t lh and t hl are measured into a capacitive load of 15pf
november 2005 p2040b rev 0.1 lcd panel emi reduction ic 5 of 8 notice: the information in this document is subject to change without notice. package information 8-lead (150-mil) soic package d e h d a1 a2 a l c b e dimensions inches millimeters symbol min max min max a1 0.004 0.010 0.10 0.25 a 0.053 0.069 1.35 1.75 a2 0.049 0.059 1.25 1.50 b 0.012 0.020 0.31 0.51 c 0.007 0.010 0.18 0.25 d 0.193 bsc 4.90 bsc e 0.154 bsc 3.91 bsc e 0.050 bsc 1.27 bsc h 0.236 bsc 6.00 bsc l 0.016 0.050 0.41 1.27 0 8 0 8
november 2005 p2040b rev 0.1 lcd panel emi reduction ic 6 of 8 notice: the information in this document is subject to change without notice. e h a a1 a2 d b c l e 8-lead thin shrunk small outline package (4.40-mm body) dimensions inches millimeters symbol min max min max a 0.043 1.10 a1 0.002 0.006 0.05 0.15 a2 0.033 0.037 0.85 0.95 b 0.008 0.012 0.19 0.30 c 0.004 0.008 0.09 0.20 d 0.114 0.122 2.90 3.10 e 0.169 0.177 4.30 4.50 e 0.026 bsc 0.65 bsc h 0.252 bsc 6.40 bsc l 0.020 0.028 0.50 0.70 0 8 0 8
november 2005 p2040b rev 0.1 lcd panel emi reduction ic 7 of 8 notice: the information in this document is subject to change without notice. ordering information part number marking package configuration temperature range p2040b -08-st p2040b 8-pin soic,tube commercial p2040b -08-sr p2040b 8-pin soic, tape and reel commercial p2040bf-08-st p2040bf 8-pin soic, tube, pb free commercial p2040bf-08-sr p2040bf 8-pin soic, tape and reel, pb free commercial p2040bg-08-st p2040bg 8-pin soic, tube, green commercial p2040bg-08-sr p2040bg 8-pin soic, tape and reel, green commercial i2040b-08-st i2040b 8-pin soic, tube industrial i2040b-08-sr i2040b 8-pin soic, tape and reel industrial i2040bf-08-st i2040bf 8-pin soic, tube, pb free industrial i2040bf-08-sr i2040bf 8-pin soic, tape and reel, pb free industrial i2040bg-08-st i2040bg 8-pin soic, tube, green industrial i2040bg-08-sr i2040bg 8-pin soic, tape and reel, green industrial p2040b-08-tt p2040b 8-pin tssop, tube commercial p2040b-08-tr p2040b 8-pin tssop, tape and reel commercial p2040bf-08-tt p2040bf 8-pin tssop, tube, pb free commercial p2040bf-08-tr p2040bf 8-pin tssop, tape and reel, pb free commercial p2040bg-08-tt p2040bg 8-pin tssop, tube, green commercial p2040bg-08-tr p2040bg 8-pin tssop, tape and reel, green commercial i2040b-08-tt i2040b 8-pin tssop, tube industrial i2040b-08-tr i2040b 8-pin tssop, tape and reel industrial i2040bf-08-tt i2040bf 8-pin tsso p, tube, pb free industrial i2040bf-08-tr i2040bf 8-pin tssop, tape and reel, pb free industrial i2040bg-08-tt i2040bg 8-pin t ssop, tube, green industrial i2040bg-08-tr i2040bg 8-pin tssop, tape and reel, green industrial device ordering information p2040b f-08-xx licensed under us patent #5,488 ,627, #6,646,463 a nd #5,631,920. sr - soic, t/r tt ? tssop, tube tr - tssop, t/r st ? soic , tube device numbe r flow: p = commercial temperature range (0c to 70c) i = industrial temperature range (-40c to 85c) pin count deviation ( % ) and s p read o p tion identifie r f =lead free and and rohs compliant part g = green
november 2005 p2040b rev 0.1 lcd panel emi reduction ic 8 of 8 notice: the information in this document is subject to change without notice. ? copyright 2003 alliance semiconductor corporation. all rights reserved. our three-point logo, our name and intelliwatt are trademarks or registered trademarks of alliance. all other brand and product names may be the trademarks of their respective companies. alliance reserves the right to make ch anges to this document and its products at any time without notice. alliance assumes no responsibility for any errors t hat may appear in this document. the data contained herein represents alliance's best data and/or estimate s at the time of issuance. alliance rese rves the right to change or correct this data at any time, without notice. if the product described herein is under development, significant changes to these specifications are possible. the information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not in tended to operate as, or provide, any guarantee or warrantee to any user or customer. alliance does not assume any responsibility or lia bility arising out of the applic ation or use of any product described herein, and disclaims any express or implied warrant ies related to the sale and/or use of alliance products including liability or warranties related to fitness for a particular purpose, mercha ntability, or infringement of any intellec tual property rights, except as express agreed to in alliance's terms and conditions of sale (which are available from alliance). all sales of alliance products are made exclusively according to alliance's terms and conditions of sale. the purchase of products from alliance does not convey a license under any pa tent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of alli ance or third parties. alliance does not aut horize its products for use as critical components in life-supporting systems where a malfunction or fa ilure may reasonably be expected to result in significant injury to the user, and the inclusion of alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify alliance against all claims arising from such use. alliance semiconductor corporation 2575 augustine drive, santa clara, ca 95054 tel# 408-855-4900 fax: 408-855-4999 www.alsc.com copyright ? alliance semiconductor all rights reserved preliminary information part number: p2040b document version: v0.1 note: this product utilizes us patent # 6,646,463 impedance emulator patent issued to alliance semiconductor, dated 11-11-2003
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